Optimizing Power Consumption in AI-Powered Edge Devices Using Advanced Semiconductor Techniques IoT and Edge Devices
Author(s): Karthik Wali
Publication #: 2507005
Date of Publication: 07.06.2019
Country: United States
Pages: 1-13
Published In: Volume 5 Issue 3 June-2019
DOI: https://doi.org/10.5281/zenodo.16500286
Abstract
Current and voltage levels are random and critical for AI applications in edge devices since they have high time sensitivity, and real-time processing is essential for accurate computation. The use of
modern semiconductor technologies such as low-power transistors, low-power memory hierarchy, and efficient power circuits has brought hope for efficient power management. In this paper, some
emerging approaches to reducing energy consumption while achieving high performance of artificial intelligence on edge devices are discussed. Some of the emerging technology frontiers we explore
include: The four discussed technologies are FinFETs, FD-SOI, near-threshold computing, and heterogeneous architectures. Furthermore, it discusses power-conscious machine learning algorithms and dynamic voltage and frequency scaling (DVFS) to improve power consumption. It should be noted that the proposed framework has been further assessed by power consumption, calculations, and dependability. Such findings imply that there is a notable time cut in energy demand with the added benefit of real-time performance. This paper provides a perspective on what energy-efficient
neural network-based edge computing will look like in the future and gives the reader some suggestions as to how those techniques can be implemented in future devices.
Keywords: AI-powered edge devices, Semiconductor techniques, FinFETs, FD-SOI, Near-threshold computing, DVFS, Power optimization, Heterogeneous architectures.
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